FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1456
Freescale Semiconductor
33.5.2.2.2
Register write access requirements
All registers can be accessed with 8-bit, 16-bit and 32-bit wide operations. For some of the registers, at
least a 16-bit wide write access is required to ensure correct operation. This write access requirement is
stated in the detailed register description for each register affected
33.5.2.2.3
Internal register access
The following memory mapped registers are used to access multiple internal registers.
•
Strobe Signal Control Register (FR_STBSCR)
•
Slot Status Selection Register (FR_SSSR)
•
Slot Status Counter Condition Register (FR_SSCCR)
•
Receive Shadow Buffer Index Register (FR_RSBIR)
Each of these memory mapped registers provides a SEL field and a WMD bit. The SEL field is used to
select the internal register. The WMD bit controls the write mode. If the WMD bit is set to 0 during the
write access, all fields of the internal register are updated. If the WMD bit set to 1, only the SEL field is
changed. All other fields of the internal register remain unchanged. This allows for reading back the values
of the selected internal register in a subsequent read access.
33.5.2.3
Module Version Register (FR_MVR)
This register provides the CC version number. The module version number is derived from the CHI version
number and the PE version number.
POC:config
FR_PSR0[PROTSTATE] =
POC:config
Write access only when Protocol is in the
POC:config
state
MB_DIS
FR_MBCCSR[EDS] = 0
Write access only when related Message Buffer is
disabled
MB_LCK
FR_MBCCSRn[LCKS] = 1
Write access only when related Message Buffer is locked
IDL
FR_EEIRICR[BSY] = 0
Write access only when ECC configuration is idle
Base + 0x0000
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
CHIVER
PEVER
W
Reset
1
0
1
0
0
0
1
0
0
1
1
0
1
0
0
0
Figure 33-2. Module Version Register (FR_MVR)
Table 33-6. Register write access restrictions (continued)
Condition
Indication
Description
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