NXP Semiconductors MPC5644A, Reference Manual, Page: 330 / 1735

External Bus Interface (EBI)
MPC5644A Microcontroller Reference Manual, Rev. 6
330 Freescale Semiconductor
The number of external transfers for each internal AHB master request is determined by the HSIZE value
for that request relative to the port size. For example, a half-word write to @011 (misaligned case #2) with
16-bit port size results in 4 external 16-bit transfers because the HSIZE is 64-bits. For cases where two or
more external transfers are required for one internal transfer request, these external accesses are considered
part of a “small access” set, as described in
Section 14.5.2.6, Small accesses (Small port size and short
burst length) .
Since all transfers are aligned on the external bus, normal timing diagrams and protocol apply.
Table 14-20. Misalignment Cases Supported by a 64 bit AMBA EBI (external bus)
No.
1
PS
2
Program Size
and byte offset
ADDR[29:31]
3
WE_BE[0:3]
4
1 0 Half @0x1,0x9 000 1001
1 000
010 1011
0111
2 0 Half @0x3,0xB 000
100 1110
0111
1 010
100 1011
0111
3 0 Half @0x5,0xD 100 1001
1 100
110
1011
0111
4 0 Half @0x7,0xF
(2 AHB
transfers)
111
5
1110
- 000 0111
4 1 110 1011
- 000 0111
5 0 Word @0x1,0x9 000
100 1000
0111
1 000
010
100 1011
0011
0111
6 0 Word @0x2,0xA 000
100 1100
0011
1 010
100 0011
0011
7 0 Word @0x3,0xB 000
100 1110
0001
1 010
100
110
1011
0011
0111
8 0 Word @0x5,0xD
(2 AHB
transfers)
100 1000
- 000 0111
8 1 100
110
1011
0011
- 000 0111
9 0 Word @0x6,0xE
(2 AHB
transfers)
110
6
1100
- 000 0011
9 1 110
6
0011
- 000 0011