NXP Semiconductors MPC5644A, Reference Manual, Page: 281 / 1735

External Bus Interface (EBI)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 281
14.3 External signal description
14.3.1 Overview
Table 14-2 lists the external pins used by the EBI. Not all signals listed here are available external to the
chip.
63 BDIP 0b001 BDIP 0b001 BDIP 0b001
64 WE[0]/BE[0] 0b001 WE[0]/BE[0] 0b001 WE[0]/BE[0] 0b001
65 WE[1]/BE[1] 0b001 WE[1]/BE[1] 0b001 WE[1]/BE[1] 0b001
68 OE 0b001 OE 0b001 OE 0b001
69 TS 0b001 ALE 0b010 ALE 0b010
70 TA 0b001 TS 0b010 TS 0b010
1
16-bit non-multiplexed mode supported for EBI configured with EBI_MCR[D16_31]=0, and
respective BRx/CAL_BRx[AD_MUX]=0. Pin multiplexing does not support 16-bit non multiplexed
mode for EBI configured with EBI_MCR[D16_31]=1.
2
16 bit multiplexed mode shown for EBI configured with EBI_MCR[D16_31]=0, and respective
BRx/CAL_BRx[AD_MUX]=1. This is the optimal 16 bit mux mode, as it allows access to FlexRay
signals on unused EBI signals. Operation also possible with EBI_MCR[D16_31]=1, using
DATA[16:31] signals for EBI and leaving DATA[0:15] balls available for GPIO use.
3
32-bit multiplexed mode shown for EBI configured with EBI_MCR[D16_31]=0, and respective
BRx/CAL_BRx[AD_MUX]=1.
4
Pin functionality chosen dependent on required addressing range and chip select availability.
5
Pin function/s not required to support EBI in this usage mode.
6
Data/address dynamically multiplexed internally by EBI, not SIU pin muxing.
Table 14-2. Signal Properties
Name I/O Type Function Pull
1
ADDR[3:31] I/O Address bus —
BDIP Output Burst Data in Progress Up
CLKOUT
2
Output Clockout —
CAL_CS[0:3] Output Calibration Chip Selects Up
DATA[0:31] I/O Data bus
3
—
OE Output Output Enable Up
RD_WR I/O Read_Write Up
TA I/O Transfer Acknowledge Up
TS I/O Transfer Start Up
Table 14-1. Typical pin usage across supported EBI modes (continued)
Pin
EBI Usage Mode
16-bit
non-muxed
1
PCR[PA
]
16-bit muxed
2
PCR[PA] 32-bit muxed
3
PCR[PA
]