NXP Semiconductors MPC5644A, Reference Manual, Page: 266 / 1735

Memory Protection Unit (MPU)
MPC5644A Microcontroller Reference Manual, Rev. 6
266 Freescale Semiconductor
NOTE
For the processor privilege rights, there are three flags associated with this
function: {read, write, execute}. In this context, these flags follow the
traditional definition:
Read (r) permission refers to the ability to access the referenced memory
address using an operand (data) fetch.
Write (w) permission refers to the ability to update the referenced memory
address using a store (data) instruction.
Execute (x) permission refers to the ability to read the referenced memory
address using an instruction fetch.
Writes to this word clear the region descriptor’s valid bit. Because it is also expected that system software
may adjust only the access controls within a region descriptor (MPU_RGD
n .Word2) as different tasks
execute, an alternate programming view of this 32-bit entity is provided. If only the access controls are
being updated, this operation should be performed by writing to MPU_RGDAAC
n (alternate access
control n ) as stores to these locations do not affect the descriptor’s valid bit.
The MPU operates on the following masters:
• M0: e200z4 core
• M4: eDMA
• M6: FlexRay
• M7: EBI
Address: MPU_BASE (0xFFF1_0000) + 0x400 + (16* n ) + 0x8 (MPU_RGD n .Word2) Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
M7RE
M7WE
M6RE
M6WE
M4RE
M4WE
W
Reset – – – – – – – – – – – – – – – –
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
M0
P
E
M0SM
M0UM
W r w x
Reset – – – – – – – – – – – – – – – –
= not implemented
Refer to Table 9-1 , in the XBAR chapter, to see the Master ID assignments.
Figure 13-6. MPU Region Descriptor n, Word 2 Register (MPU_RGDn.Word2)