NXP Semiconductors MPC5644A, Reference Manual, Page: 958 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
958 Freescale Semiconductor
NOTE
Read match, ERWA/B and CHAN assignment can be active at the same
instruction. Combining rules
Section 24.5.9.6.5, CHAN assignment, Read
Match and ERWA/B , and Section 24.5.9.6.6, Read Match and ERWA/B , the
result is: ERTA/B receives the CaptureA/B values of the new CHAN value,
and MatchA/B of the new channel receives the old ERTA/B value(s).
24.5.9.6.7 Stack accesses and ALU operations
Post-increment is ignored in a stack operation (field STC) if DIOB is loaded from SPRAM: DIOB keeps
the value read from SPRAM. Pre-decrement is ignored in a stack operation (field STC) if DIOB is
destination of an ALU operation, for DIOB load value, but not for DIOB as address.
Post-increment/pre-decrement remains valid in all other situations. These rules can be summarized in the
following equivalent C code, and in
Table 24-117 .
DIOB = *DIOB[15:2]; // read without posinc/predec
*DIOB[15:2] = DIOB; // write without posinc/predec
DIOB = *(--DIOB[15:2]); // read with predec
DIOB = *DIOB[15:2]; // read with posinc (ignored)
*(--DIOB[15:2]) = DIOB; // write with predec
*DIOB[15:2]++ = DIOB; // write with posinc (value written is before increment)
24.5.9.6.8 SRC and ALU/MDU operations
If operation SRC is active (field SRC = 0) and register SR is selected as destination of an ALU operation,
the value of the ALU operation prevails over the shifted value.
The value of SR used as source in the ALU/MDU operation is the one before the shift.
24.5.9.6.9 Semaphore lock/free and SMLCK branch condition
When the SMLCK branch condition is tested at the same microinstruction of a semaphore lock or free, the
condition is evaluated after the semaphore action (either free or lock) is taken.
24.5.9.6.10 Dispatch and SPRAM read
When the most significant byte of P is read from SPRAM (read 8 msb bits or 32 bits) and a dispatch
instruction is executed simultaneously, the dispatch target address is calculated upon the P value before the
read.
24.5.9.6.11 CHAN Assignment, PSC/PSCS, and clear MRLEA/B, MRLA/B, TDLA/B
When clear MRLEs, MRLA/B or TDLs is done and a CHAN assignment is done at the same time, the flag
selected by the old CHAN value is cleared in the channel, but the branch conditions receive the state of
the flags selected by the new CHAN.
When a pin action is commanded through PCS/PSCS and a CHAN assignment is done simultaneously, the
output signal affected is selected with the old CHAN value.