NXP Semiconductors MPC5644A, Reference Manual, Page: 1574 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1574 Freescale Semiconductor
CHI Error Flag Register (FR_CHIERFR) will be set. The transitions that will be triggered depends on the
current value of the LCKS bit. The lock and unlock commands will only affect the commit side. If the
application triggers the lock transition HL while the commit side is in the state CCITx, the message buffer
state will not be changed and the message buffer lock error flag LCK_EF in the
CHI Error Flag Register
(FR_CHIERFR) will be set.
Module transitions
The module transitions that can be triggered by the CC are described in Table 33-120 . The transitions C1
and C2 apply to both sides of the message buffer and are applied at the same time. All other CC transitions
apply to the transmit side only.
Table 33-119. Double transmit message buffer host transitions
Transition Host command Condition Description
HE FR_MBCCSR(2n+1)[EDT] = 1 FR_MBCCSR(2n+1)[EDS] = 0 Application triggers message buffer
enable
HD FR_MBCCSR(2n+1)[EDS] = 1 Application triggers message buffer
disable
HL FR_MBCCSR(2n)[LCKT] = 1 FR_MBCCSR(2n)[LCKS] = 0 Application triggers message buffer
lock
HU FR_MBCCSR(2n)[LCKS] = 1 Application triggers message buffer
unlock
Table 33-120. Double transmit message buffer module transitions
Transition Condition Description
Common transitions
IS See
Section 33.6.6.4.5,
Internal message
transfer
Internal Message Transfer Start – Start transfer of message data from commit
side to transmit side
IE Internal Message Transfer End – Stop transfer of message data from commit
side to transmit side
Note: The internal message transfer is stopped before the slot or segment start.
Transmit side specific transitions
SA Slot match and
static slot
Slot Assigned – Message buffer is assigned to next static slot
MA Slot match and
CycleCounter match
Message Available – Message buffer is assigned to next slot and cycle counter
filter matches
TX Slot start and
FR_MBCCSR(2n + 1)
[CMT] = 1
Transmission Slot Start – Slot Start and commit bit CMT is set.
In case of a dynamic slot, pLatestTx is not exceeded.
SU Status updated Status Updated – Slot Status field and message buffer status flags updated.
Interrupt flag set.
STS Static slot start Static Slot Start – Start of static slot.