NXP Semiconductors MPC5644A, Reference Manual, Page: 316 / 1735

External Bus Interface (EBI)
MPC5644A Microcontroller Reference Manual, Rev. 6
316 Freescale Semiconductor
Figure 14-26. Burst 32-bit Read Cycle, One Wait State between Beats, TBDIP=1
14.5.2.6 Small accesses (Small port size and short burst length)
In this context, a small access refers to an access whose burst length and port size (BL, PS bits in Base
Register for chip-select access or default burst disabled, 32-bit port for non-chip-select access) are such
that the number of bytes requested by the internal master cannot all be fetched (or written) in one external
transaction. If this is the case, the EBI initiates multiple transactions until all the requested data is
transferred. It should be noted that all the transactions initiated to complete the data transfer are considered
as an atomic transaction, so the EBI does not allow other unrelated master accesses to intervene between
the transfers.
Table 14-13 shows all the combinations of burst length, port size, and requested byte count that cause the
EBI to run multiple external transactions to fulfill the request.
Table 14-13. Small Access Cases
Byte Count
Requested by internal
master
Burst Length Port Size
# External Accesses
to Fulfill Request
Non-Burstable Chip-Select Banks (BI=1) or Non-Chip-Select Access
4 1 beat 16-bit 2/1
1
8 1 beat 32-bit 2
8 1 beat 16-bit 4
16
2
1 beat 32-bit 4
16
2
1 beat 16-bit 8
32
3
1 beat 32-bit 8
32
3
1 beat 16-bit 16
Burstable Chip-Select Banks (BI=0)
DATA is valid
Wait state
Wait state
CLKOUT
ADDR[3:31]
BDIP
TA
RD_WR
TS
OE
CS[ n ]
Expects more data
ADDR[29:31] = 000
Wait state Wait state
DATA[0:31]