NXP Semiconductors MPC5644A, Reference Manual, Page: 1451 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1451
0x005A Timer Configuration and Control Register (FR_TICCR) R/W on page
33-1494
0x005C Timer 1 Cycle Set Register (FR_TI1CYSR) R/W on page
33-1495
0x005E Timer 1 Macrotick Offset Register (FR_TI1MTOR) R/W on page
33-1495
0x0060 Timer 2 Configuration Register 0 (FR_TI2CR0) R/W on page
33-1496
0x0062 Timer 2 Configuration Register 1 (FR_TI2CR1) R/W on page
33-1497
Slot Status Configuration
0x0064 Slot Status Selection Register (FR_SSSR) R/W on page
33-1497
0x0066 Slot Status Counter Condition Register (FR_SSCCR) R/W on page
33-1498
Slot Status
0x0068 Slot Status Register 0 (FR_SSR0) R on page
33-1500
0x006A Slot Status Register 1 (FR_SSR1) R on page
33-1500
0x006C Slot Status Register 2 (FR_SSR2) R on page
33-1500
0x006E Slot Status Register 3 (FR_SSR3) R on page
33-1500
0x0070 Slot Status Register 4 (FR_SSR4) R on page
33-1500
0x0072 Slot Status Register 5 (FR_SSR5) R on page
33-1500
0x0074 Slot Status Register 6 (FR_SSR6) R on page
33-1500
0x0076 Slot Status Register 7 (FR_SSR7) R on page
33-1500
0x0078 Slot Status Counter Register 0 (FR_SSCR0) R on page
33-1502
0x007A Slot Status Counter Register 1 (FR_SSCR1) R on page
33-1502
0x007C Slot Status Counter Register 2 (FR_SSCR2) R on page
33-1502
0x007E Slot Status Counter Register 3 (FR_SSCR3) R on page
33-1502
Table 33-3. FlexRay memory map (continued)
Offset Register Access Location