NXP Semiconductors MPC5644A, Reference Manual, Page: 371 / 1735

Interrupt Controller (INTC)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 371
Figure 15-15. Software Vector Mode Handshaking Timing Diagram
15.5.3.2 Hardware vector mode handshaking
A timing diagram of the interrupt request and acknowledge handshaking in hardware vector mode, along
with the handshaking near the end of the interrupt exception handler, is shown in
Figure 15-16 . As in
software vector mode, the INTC examines the peripheral and software configurable interrupt requests, and
when it finds an asserted one with a higher priority than PRI in INTC_CPR, it asserts the interrupt request
to the processor. The INTVEC field in the INTC_IACKR is updated with the preempting peripheral or
software configurable interrupt request’s vector when the interrupt request to the processor is asserted. The
INTVEC field retains that value until the next time the interrupt request to the processor is asserted. In
addition, the value of the interrupt vector to the processor matches the value of the INTVEC field in the
INTC_IACKR. The rest of the handshaking is described in
Section 15.2.4.2, Hardware vector mode .
The handshaking near the end of the interrupt exception handler, that is the writing to the INTC_EOIR, is
the same as in software vector mode. Refer to
Section 15.5.3.1.2, End-of-interrupt exception handler .
Clock
Interrupt Request
to Processor
Hardware Vector
Enable
Interrupt
Acknowledge
Interrupt Vector
Read
INTC_IACKR
Write
INTC_EOIR
INTVEC in
INTC_IACKR
PRI in
INTC_CPR
Peripheral Interrupt
Request 100
0
0
0
108
1 0