ABB RELION REX640, Техническое руководство, Страница: 1114 / 1960

Figure 626: The behavior of the IDMT timer and the output ST_OVLOD
The
ST_DUR_OVLOD
output indicates the percentage ratio of the start situation and
the operation time in the Timer 1 module and is available in the monitored data
view.
The Timer 1 module is internally blocked for one second after the
capacitor bank is connected by detecting the rising edge of the
CB_CLOSED
signal. The
CB_CLOSED
signal is True when the CB position
is closed.
Alarm level detector
The Alarm level detector compares
I_PEAK_INT_x
value to
Alarm start value. If the
phase or phases in which
I_PEAK_INT_x
exceeds the setting matches the Num of
start phases setting, the Alarm level detector module activates the Timer 2 module.
The
Num of start phases setting is a common setting for both Operate
level detector and Alarm level detector.
Timer 2
The Timer 2 characteristics are according to Definite Time (DT) .When the operation
timer has reached the value of
Alarm delay time, the
ALARM
output is activated.
If a drop-off situation happens, the timer is reset.
The Timer 2 module is internally blocked for one second after the
capacitor bank is connected by detecting the rising edge of the
Protection functions 1MRS759142 F
1114 REX640
Technical Manual