ADSP-BF535 Blackfin Processor Hardware Reference
14-33
USB Device
USB Endpoint x Address Offset Registers
(USBD_EPADRx)
These registers, represented in
Figure 14-19
, are used to program the
memory buffer offset for data transfers.
They hold the memory offset within the DMA controller’s memory space
for the transfer associated with this endpoint.
DMA transfers occur on 16-byte aligned offsets within the controller’s
memory space (2 KB). As each packet is transferred on the USB, the
USBD_OFFSET
increments by the packet size.
For the USB Endpoint x Address Offset registers and the USB
Endpoint x Buffer Length registers (
USBD_EPLENx
), it is assumed that soft-
ware is keeping track of the original buffer addresses and can calculate the
bytes transferred and the end of valid data based on reading back these
registers at the end of a transfer.
Figure 14-19. USB Endpoint x Address Offset Registers
15 14
13 12
11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
USB Endpoint x Address Offset Registers (USBD_EPADRx)
USBD_OFFSET[10:0]
Memory offset within the
DMA controller’s memory
space
Reset = 0x0000
For MMR
assignments, see
Table 14-4
.
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...