Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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ADSP-BF535 Blackfin Processor Hardware Reference 4-17
Program Sequencer

When
LCx = 0
, the loop is disabled, and a single pass of the code
executes.
The ADSP-BF535 processor supports a four-location instruction loop
buffer that reduces instruction fetches while in loops. If the loop code
contains four or fewer instructions, then no fetches to instruction memory
are necessary for any number of loop iterations, because the instructions
are stored locally. The loop buffer effectively shortens the instruction
fetch time in loops with more than four instructions by allowing fetches to
take place while instructions in the loop buffer are being executed.
Events and Sequencing
The Event Controller of the processor manages five types of activities:
• Emulation
• Reset
• Non-maskable interrupts (NMI)
• Exceptions
• Interrupts
Table 4-5. Loop Registers
First/Last Address of the
Loop PC-Relative Offset Used to
Compute the Loop Start Address Effective Range of the Loop
Start Instruction
Top / First 5-bit signed immediate; must be a
multiple of 2. 0 to 30 bytes away from
LSETUP
instruction.
Bottom / Last 11-bit signed immediate; must be a
multiple of 2. 0 to 2046 bytes away from
LSETUP
instruction (the defined
loop can be 2046 bytes long).