ADSP-BF535 Blackfin Processor Hardware Reference
2-7
Computational Units
• A Stack Pointer register (
SP
) used to point to the last used location
on the runtime stack. See mode dependent registers in
“Operating
Modes and States” on page 3-1
.
P-registers are 32 bits wide. Although P-registers are primarily used for
address calculations, they may also be used for general integer arithmetic
with a limited set of arithmetic operations, for instance, to maintain coun-
ters. However, unlike the Data registers, P-register arithmetic does not
affect the Arithmetic Status (
ASTAT
) register status flags.
DAG Register Set
DSP instructions primarily use the Data Address Generator (DAG) regis-
ter set for addressing. The DAG register set consists of these registers:
•
I[3:0]
contain index addresses
•
M[3:0]
contain modify values
•
B[3:0]
contain base addresses
•
L[3:0]
contain length values
All DAG registers are 32 bits wide.
The I (Index) registers and B (Base) registers always contain addresses of
8-bit bytes in memory. The Index registers contain an effective address.
The M (Modify) registers contain an offset value that is added to one of
the Index registers or subtracted from it.
The B (Base) and L (Length) registers define circular buffers. B contains
the starting address of a buffer, and L contains the length in bytes. Each L
and B register pair is associated with the corresponding I register. For
example,
L0
and
B0
are always associated with
I0
. However, any M register
may be associated with any I register. For example,
I0
may be modified by
M3
. For more information, see
“Data Address Generators” on page 5-1
.
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...