Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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SDRAM Controller (SDC)
18-66 ADSP-BF535 Blackfin Processor Hardware Reference
Table 18-14. 16-Bit SDRAM Bank, 10 Column Address Pins
ADSP-BF535
Processor Address Pin Internal Address
for RAS Internal Address
for CAS SDRAM Address
Pin
ADDR[14] IA[26] A[13]
ADDR[13] IA[25] A[12]
ADDR[12] IA[24] A[11]
SA[10] IA[23] A[10]
ADDR[10] IA[22] IA[10] A[9]
ADDR[9] IA[21] IA[9] A[8]
ADDR[8] IA[20] IA[8] A[7]
ADDR[7] IA[19] IA[7] A[6]
ADDR[6] IA[18] IA[6] A[5]
ADDR[5] IA[17] IA[5] A[4]
ADDR[4] IA[16] IA[4] A[3]
ADDR[3] IA[15] IA[3] A[2]
ADDR[2] IA[14] IA[2] A[1]
ADDR[1] IA[13] IA[1] A[0]
ADDR[19] IA[12] IA[12] BA[1]
ADDR[18] IA[11] IA[11] BA[0]
Possible configurations:
1 chip: 512 Mb - 8 M

16

4 banks (64 MB)
2 chips: 256 Mb - 8 M

8

4 banks (64 MB)
2 chips: 128 Mb - 4 M

8

4 banks (32 MB)
4 chips: 64 Mb - 4 M

4

4 banks (32 MB)