Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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ADSP-BF535 Blackfin Processor Hardware Reference 18-5
External Bus Interface Unit
EBIU Arbitration
The SDC and the AMC can accept transaction requests in parallel, if
queue capacity is available. However, the External Bus Controller (EBC)
serializes requests from the EMB and the EAB internal buses. The EMB
bus is strictly for PCI accesses. The EMB and EAB buses have equal prior-
ity. However, once the EBIU grants a bus request to either the EMB or
the EAB bus, the arbitration algorithm favors the opposite bus for subse-
quent requests if both buses are requesting EBIU access.
External Memory Interfaces
Both the AMC and the SDC share the external interface address and data
pins, as well as some of the control signals.
Table 18-1 and Table 18-2
describe the signals associated with each interface. Pin types are abbrevi-
ated with “I” for input and “O” for output.
No other signals are multiplexed between the two controllers.
Table 18-1. Description of Shared EBIU Port Pins
EBIU Port Pins Pin Type Description
DATA[31:0]
I/O Data Bus
ADDR[19:2]
O Address Bus
ABE[3]/SDQM[3]/ADDR[1]
O AMC Byte Enable 3/SDC Data Mask 3/Address 1
ABE[2:0]/SDQM[2:0]
O AMC Byte Enables/SDC Data Masks
CLKOUT/SCLK[1]
O AMC System Clock Output/SDC Clock 1