ADSP-BF535 Blackfin Processor Hardware Reference
19-15
System Design
You can add a series termination resistor near the pin for point-to-point
connections. Typically, serial port applications use this termination
method when distances are greater than six inches. For details, see the ref-
erence source in
“Recommended Reading” on page 19-17
for suggestions
on transmission-line termination. Also, see
ADSP-BF535 Blackfin Embed-
ded Processor Data Sheet
for output drivers’ rise and fall time data.
Signal Integrity
The capacitive loading on high-speed signals should be reduced as much
as possible. Loading of buses can be reduced by using a buffer for devices
that operate with wait states (for example, DRAMs). This reduces the
capacitance on signals tied to the zero-wait-state devices, allowing these
signals to switch faster and reducing noise-producing current spikes.
Signal run length (inductance) should also be minimized to reduce ring-
ing. Extra care should be taken with certain signals such as external
memory, read, write and acknowledge strobes.
Other recommendations and suggestions to promote signal integrity:
• Use more than one ground plane on the PCB to reduce crosstalk.
Be sure to use lots of vias between the ground planes. These planes
should be in the center of the PCB.
• Keep critical signals such as clocks, strobes, and bus requests on a
signal layer next to a ground plane and away from or laid out per-
pendicular to other non-critical signals to reduce crosstalk.
• Design for lower transmission line impedances to reduce crosstalk
and to allow better control of impedance and delay.
• Experiment with the board and isolate crosstalk and noise issues
from reflection issues. This can be done by driving a signal wire
from a pulse generator and studying the reflections while other
components and signals are passive.
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...