Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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Hardware Error Interrupt
4-44 ADSP-BF535 Blackfin Processor Hardware Reference
To determine whether an exception occurred while an exception handler
was executing, check
SEQSTAT
at the end of the exception handler. If an
exception has occurred, register
RETX
holds the address of the instruction
that caused the exception.
At the end of the exception handler, the return address is used to return
normally to lower interrupt level code. Whether an exception occurs dur-
ing the execution of an NMI, emulation, or reset event, the same set of
actions occurs.
Hardware Error Interrupt
The hardware error interrupt indicates a hardware error or system mal-
function. Hardware errors occur when logic external to the core, such as a
memory bus controller, is unable to complete a data transfer (read or
write) and asserts the core’s error input signal. Such hardware errors
invoke the hardware error interrupt (interrupt
IVHW
in the Event Vector
Table (EVT) and
ILAT
,
IMASK
, and
IPEND
registers). The hardware error
interrupt service routine can then read the cause of the error from the
5-bit
HWERRCAUSE
field appearing in the Sequencer Status register (
SEQ-
STAT
) and respond accordingly.
The hardware error interrupt is generated by:
• Attempted access to a reserved memory location
• Attempted access to uninitialized external memory space
• Bus parity errors
• Internal error conditions within the core, such as Performance
Monitor overflow
• The DMA Access Bus Comparator interrupt (attempted write to
an active DMA register)