Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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External Memory Interfaces
18-6 ADSP-BF535 Blackfin Processor Hardware Reference
Table 18-2. Asynchronous Memory Interface Signals
EBIU Port Pins Pin Type Description
DATA[31:0]
I/O External Data Bus
ADDR[25:2]
O External Address Bus
AMS[3:0]
O Asynchronous Memory Selects
AWE
O Asynchronous Memory Write Enable
ARE
O Asynchronous Memory Read Enable
AOE
O Asynchronous Memory Output Enable
Asynchronous Memory Output Enable. In most
cases, the
AOE
pin should be connected to the
OE
pin of an external memory-mapped asynchronous
device. Refer to
ADSP-BF535 Blackfin Embedded
Processor Data Sheet for specific timing informa-
tion between the
AOE
and
ARE
signals to deter-
mine which interface signal should be used in
your system.
ARDY
I Asynchronous Memory Ready Response
Note this is a synchronous input.
ABE[3]/ADDR[1]
O Byte Enables
For 16 bit wide asynchronous memories
ADDR[1]
is output on
ABE[3]
. Shared with SDC.
ABE[2:0]
O Byte Enables
CLKOUT
O System Clock Output
Table 18-3. SDRAM Interface Signals
EBIU Port Pins Pin Type Description
DATA[31:0]
I/O External Data Bus
ADDR[19:18]
,
ADDR[16:2]
O External Address Bus
Connect to SDRAM Address pins. Bank address is output
on
ADDR[19:18]
and should be connected to SDRAM
BA[1:0]
pins.
SRAS
O SDRAM Row Address Strobe pin
Connect to SDRAM’s
RAS
pin.