Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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Asynchronous Memory Controller—EBIU
B-28 ADSP-BF535 Blackfin Processor Hardware Reference
Asynchronous Memory Controller—EBIU
Table B-15 lists the MMR assignments for the Asynchronous Memory
Controller - External Bus Interface Unit registers (0xFFC0 3C00–
0xFFC0 3FFF).
PCI Bridge Registers
Table B-16 lists the MMR assignments for the PCI Bridge registers
(ranges 0xFFC0 4000–0xFFC0 43FF and 0xEEFF FF00–0xEEFF FFFF).
Table B-15. External Bus Interface Unit Registers
Memory- Mapped
Address Register Name See Section
0xFFC0 3C00 EBIU_AMGCTL “Asynchronous Memory Global Control Reg-
ister (EBIU_AMGCTL)” on page 18-10
0xFFC0 3C04 EBIU_AMBCTL0 “Asynchronous Memory Bank Control Regis-
ters (EBIU_AMBCTL0, EBIU_AMBCTL1)”
on page 18-12
0xFFC0 3C08 EBIU_AMBCTL1 “Asynchronous Memory Bank Control Regis-
ters (EBIU_AMBCTL0, EBIU_AMBCTL1)”
on page 18-12
Table B-16. PCI Bridge Registers
Memory- Mapped
Address Register Name See Section
0xFFC0 4000 PCI_CTL “PCI Bridge Control Register (PCI_CTL)”
on page 13-20
0xFFC0 4004 PCI_STAT “PCI Status Register (PCI_STAT)” on
page 13-21
0xFFC0 4008 PCI_ICTL “PCI Interrupt Controller Register
(PCI_ICTL)” on page 13-22