Timing Examples
11-70
ADSP-BF535 Blackfin Processor Hardware Reference
These timing examples show the relationships between the signals but are
not scaled to show the actual timing parameters of the processor. Consult
the
ADSP-BF535 Blackfin Embedded Processor Data Sheet
for actual timing
parameters and values.
These examples assume a word length of four bits (
SLEN=3
). Framing sig-
nals are active high (
LRFS=0
and
LTFS=0
).
Figure 11-35
through
Figure 11-40
show framing for receiving data.
In
Figure 11-35
and
Figure 11-36
, the normal framing mode is shown for
non-continuous data (any number of
SCK
cycles between words) and con-
tinuous data (no
SCK
cycles between words).
Figure 11-37
and
Figure 11-38
show non-continuous and continuous
receiving in the alternate framing mode. These four figures show the input
timing requirement for an externally generated frame sync and also the
output timing characteristic of an internally generated frame sync. Note
the output meets the input timing requirement; therefore, with two
SPORT channels used, one SPORT channel could provide
RFS
for the
other SPORT channel.
Figure 11-39
and
Figure 11-40
show the receive operation with normal
framing and alternate framing, respectively, in the unframed mode. A sin-
gle frame sync signal occurs only at the start of the first word, either one
SCK
before the first bit (in normal mode) or at the same time as the first bit
(in alternate mode). This mode is appropriate for multiword bursts (con-
tinuous reception).
Figure 11-41
through
Figure 11-46
show framing for transmitting data
and are very similar to
Figure 11-35
through
Figure 11-40
.
In
Figure 11-41
and
Figure 11-42
, the normal framing mode is shown for
non-continuous data (any number of
SCK
cycles between words) and con-
tinuous data (no
SCK
cycles between words).
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...