Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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G-14 ADSP-BF535 Blackfin Processor Hardware Reference
Do not confuse these “SDRAM internal banks” which are internal to the
SDRAM and are selected with the bank address, with the four “SDRAM
banks,” or “external banks,” that are enabled by the
SMS[3:0]
pins.
interrupt.
An event that suspends normal processing and temporarily diverts the flow
of control through an interrupt service routine (ISR). See
ISR .
invalid.
Describes the state of a cache line. When a cache line is invalid, a cache
line match cannot occur.
IrDA (Infrared Data Association).
A nonprofit trade association that established standards for ensuring the
quality and interoperability of devices using the infrared spectrum.
isochronous.
Processes where data must be delivered within certain time constraints.
ISR (Interrupt Service Routine).
Software that is executed when a specific interrupt occurs. A table stored
in low memory contains pointers, also called vectors, that direct the pro-
cessor to the corresponding ISR. See
EVT .
JEDEC.
(formerly known as the Joint Electronic Device Engineering Council, now
called the JEDEC Solid State Technology Association)
The semiconductor
engineering standardization body of the Electronic Industries Alliance
(EIA), an electronic industry trade association.