ADSP-BF535 Blackfin Processor Hardware Reference
10-17
SPI Compatible Port Controllers
SPIx Transmit Data Buffer Register (SPIx_TDBR)
The Transmit Data Buffer register (
SPIx_TDBR
) is a 16-bit read-write regis-
ter. Data is loaded into this register before being transmitted. Just prior to
the beginning of a data transfer, the data in
SPIx_TDBR
is loaded into the
Shift Data register (
SFDR
). A read of
SPIx_TDBR
can occur at any time and
does not interfere with or initiate SPI transfers.
When the DMA is enabled for transmit operation, the DMA engine loads
data into this register for transmission just prior to the beginning of a data
transfer. A write to
SPIx_TDBR
should not occur in this mode because this
data will overwrite the DMA data to be transmitted.
When the DMA is enabled for receive operation, the contents of
SPIx_TDBR
are repeatedly transmitted. A write to
SPIx_TDBR
is permitted in
this mode, and this data is transmitted.
If multiple writes to
SPIx_TDBR
occur while a transfer is already in prog-
ress, only the last data written is transmitted. None of the intermediate
values written to
SPIx_TDBR
are transmitted. Multiple writes to
SPIx_TDBR
are possible, but not recommended.
Figure 10-8. SPIx Transmit Data Buffer Register
15 14
13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset = 0x0000
Transmit Data Buffer
SPIx Transmit Data Buffer Register (SPIx_TDBR)
For MMR
assignments,
see
Table 10-8
.
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...