Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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System MMR Control and Status Registers
13-24 ADSP-BF535 Blackfin Processor Hardware Reference
This address is prepended to the EAB address for outgoing PCI I/O trans-
fers. The 16-bit PCI Space Base Address is prepended to the 16-bit offset
into the PCI I/O space window in ADSP-BF535 processor EAB space.
Write to this register before attempting a read or write to or from PCI I/O
space.
PCI Outbound I/O Configuration Address Register
(PCI_CBAP)
This register, shown in Figure 13-8 , is the PCI configuration space
address port. The contents of this register are put directly on the PCI AD
bus during the address phase for outgoing PCI configuration space
transfers. The register can then be used for Type 1 or Type 0 addresses
(with
IDSEL
s on the upper bits) or a combination of the two address types
if
IDSEL
generation is moved off chip. The software must generate Type 1
and Type 0 accesses. The core has no logic for conversion or
IDSEL
gener-
ation. External hardware is needed to generate
IDSEL
s.
There is no direct method for selecting devices for doing configuration in
host mode.
Figure 13-8. PCI Outbound I/O Configuration Address Register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PCI Outbound I/O Configuration Address Register (PCI_CBAP)
I/O Configuration
Address [31:16]
I/O Configuration
Address [15:0]
Reset = 0x0000 0000
0xFFC0 4014