Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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Index
I-34 ADSP-BF535 Blackfin Processor Hardware Reference
SPI (continued)
point-to-point connections, 19-14
registers, table, 10-26
Slave mode, 10-3 , 10-34
slave select function, 10-11
slave transfer preparation, 10-35
transfer formats, 10-28
transfer modes, 10-33
transmission/reception errors, 10-15
SPI-compatible peripherals, 10-1
SPI (Serial Peripheral Interface) ports, 1-1 ,
1-19
SPI slave select, 10-11
SPISS. See Serial Peripheral Interface Slave
Select Input signal.
SPI status register (SPIx_ST), 10-15
SPI transfer formats, 10-28
SPIx Baud Rate registers (SPIx_BAUD),
10-7 , 10-27
SPIx_BAUD (SPIx Baud Rate registers),
10-7 , 10-27
SPIx_CONFIG (SPIx DMA
Configuration registers), 10-21 , 10-27
SPIx Control registers (SPIx_CTL), 10-4 ,
10-8 , 10-27
SPIx_COUNT (SPIx DMA Count
registers), 10-23 , 10-27
SPIx_CTL (SPIx Control registers), 10-4 ,
10-8 , 10-27
SPIx_CURR_PTR (SPIx DMA Current
Descriptor Pointer registers), 10-20 ,
10-27
SPIx_DESCR_RDY (SPIx DMA
Descriptor Ready registers), 10-25 ,
10-28
SPIx DMA Configuration registers
(SPIx_CONFIG), 10-21 , 10-27
SPIx DMA Count registers
(SPIx_COUNT), 10-23 , 10-27
SPIx DMA Current Descriptor Pointer
registers (SPIx_CURR_PTR), 10-20 ,
10-27
SPIx DMA Descriptor Ready registers
(SPIx_DESCR_RDY), 10-25 , 10-28
SPIx DMA Interrupt registers
(SPIx_DMA_INT), 10-26 , 10-28
SPIx_DMA_INT (SPIx DMA Interrupt
registers), 10-26 , 10-28
SPIx DMA Next Descriptor Pointer
registers (SPIx_NEXT_DESCR),
10-24 , 10-27
SPIx DMA Start Address High registers
(SPIx_START_ADDR_HI), 10-22 ,
10-27
SPIx DMA Start Address Low registers
(SPIx_START_ADDR_LO), 10-22 ,
10-27
SPIx Flag registers (SPIx_FLG), 10-10 ,
10-27
SPIx_FLG (SPIx Flag registers), 10-10 ,
10-27
SPIx_NEXT_DESCR (SPIx DMA Next
Descriptor Pointer registers), 10-24 ,
10-27
SPIx RDBR Shadow registers
(SPIx_SHADOW), 10-18 , 10-27
SPIx_RDBR (SPIx Receive Data Buffer
registers), 10-18 , 10-27
SPIx Receive Data Buffer registers
(SPIx_RDBR), 10-18 , 10-27
SPIx_SHADOW (SPIx RDBR Shadow
registers), 10-18 , 10-27
SPIx_START_ADDR_HI (SPIx DMA
Start Address High registers), 10-22 ,
10-27
SPIx_START_ADDR_LO (SPIx DMA
Start Address Low registers), 10-22 ,
10-27