Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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ADSP-BF535 Blackfin Processor Hardware Reference 18-59
External Bus Interface Unit
For all banks, bank_x_start_addr[31:29] = 000 and
bank_x_start_addr[32:0] = all zeros. Therefore, the bank size encodings
are as shown in
Table 18-8 .
Note even though bank2 is disabled (
EB2E
=0), the bank size (
EB2SZ
=00) is
used to determine the start addresses of successive banks and unpopu-
lated/reserved space.
SDRAM Address Mapping
To access SDRAM, the SDC multiplexes the internal 32-bit non-multi-
plexed address into a row address, a column address, a bank address, and
the byte data masks for the SDRAM device, as shown in
Figure 18-19 .
The lowest bit or bits are mapped to byte data masks, the next bits are
mapped into the column address, the next 2 bits are mapped into the bank
address, and the remaining bits are mapped into the row address. This
mapping is based on the
EBxSZ
and
EBxCAW
parameters programmed into
the SDRAM Memory Bank Control register, and the
X16DE
bit in the
EBIU_SDGTL
register.
Table 18-8. Bank Size Encodings
SDRAM
Bank Bank Size
(MB) Start Address (hex)
0 32 0x00000000
1 32 0x02000000
2 16 0x04000000
3 64 0x05000000
Reserved 368 0x09000000