Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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Load/Store Operation
6-78 ADSP-BF535 Blackfin Processor Hardware Reference
Separating load operations from their associated arithmetic functions
allows compilers or assembly language programmers to place unrelated
instructions between the load and its dependent instructions. The unre-
lated instructions execute in parallel while the processor waits for the
memory system to return the data. If the value is returned before the
dependent operation reaches the execution stage of the pipeline, the oper-
ation completes in one cycle.
In write operations, the store instruction is considered complete as soon as
it executes, even though many cycles may execute before the data is actu-
ally written to an external memory or I/O location. This arrangement
allows the processor to execute one instruction per clock cycle, and it
implies that the synchronization between when writes complete and the
execution of subsequent instructions is not guaranteed and is considered
unimportant in the context of most memory operations.
Interlocked Pipeline
In the execution of instructions, the Blackfin processor architecture imple-
ments an interlocked pipeline. When a load instruction executes, the
target register of the read operation is marked as busy until the value is
returned from the memory system. If a subsequent instruction tries to
access this register before the new value is present, the pipeline will stall
until the memory operation completes. This stall guarantees that instruc-
tions that require the use of data resulting from the load do not use the
previous or invalid data in the register, even though instructions are
allowed to start execution before the memory read completes.
This mechanism allows the execution of independent instructions between
the load and the instruction(s) that use the read target without requiring
the programmer or compiler to know how many cycles are actually needed
for the memory-read operation to complete. If the instruction immedi-
ately following the load uses the same register, it simply stalls until the
value is returned. Consequently, it operates as the programmer expects.