Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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ADSP-BF535 Blackfin Processor Hardware Reference 2-25
Computational Units
Single 16-Bit Operations
In single 16-bit operations, any two 16-bit register halves may be used as
the input to the ALU. An addition, subtraction, or logical operation pro-
duces a 16-bit result that is deposited into an arbitrary destination register
half. ALU0 is used for this operation, because it is the primary resource for
ALU operations.
For example:
R3.H = R1.H + R2.L (NS) ;
adds the 16-bit contents of
R1.H
(
R1
high half) to the contents of
R2.L
(
R2
low half) and deposits the result in
R3.H
(
R3
high half) with no saturation.
Dual 16-Bit Operations
In dual 16-bit operations, any two 32-bit registers may be used as the
input to the ALU, considered as pairs of 16-bit operands. An addition,
subtraction, or logical operation produces two 16-bit results that are
deposited into an arbitrary 32-bit destination register. ALU0 is used for
this operation, because it is the primary resource for ALU operations.
For example:
R3 = R1 +|- R2 (S) ;
adds the 16-bit contents of
R2.H
(
R2
high half) to the contents of
R1.H
(
R1
high half) and deposits the result in
R3.H
(
R3
high half) with saturation.
The instruction also subtracts the 16-bit contents of
R2.L
(
R2
low half)
from the contents of
R1.L
(
R1
low half) and deposits the result in
R3.L
(
R3
low half) with saturation (see Figure 2-11 on page 2-30 ).
Quad 16-Bit Operations
In quad 16-bit operations, any two 32-bit registers may be used as the
inputs to ALU0 and ALU1, considered as pairs of 16-bit operands. A
small number of addition or subtraction operations produces four 16-bit