Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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ADSP-BF535 Blackfin Processor Hardware Reference 2-3
Computational Units
Single function multiplier, ALU, and shifter instructions have unrestricted
access to the data registers in the Data Register File. Multifunction opera-
tions may have restrictions that are described in the section for that
operation.
Two additional registers, A0 and A1, provide 40-bit accumulator results.
These registers are dedicated to the ALUs and are used primarily for mul-
tiply-and-accumulate functions.
The traditional modes of arithmetic operations, such as fractional and
integer, are specified directly in the instruction. Rounding modes are set
from the
ASTAT
register, which also records status/conditions for the
results of the computational operations.
Using Data Formats
Blackfin processors are primarily 16-bit, fixed-point machines. Most oper-
ations assume a two’s-complement number representation, while others
assume unsigned numbers or simple binary strings. Other instructions
support 32-bit integer arithmetic, with further special features supporting
8-bit arithmetic and block floating point. For detailed information about
each number format, see
“Numeric Formats” on page D-1 .
In the Blackfin processor family arithmetic, signed numbers are always in
two’s-complement format. These processors do not use signed-magnitude,
one’s-complement, BCD, or excess-n formats.
Binary String
The binary string format is the least complex binary notation; in it, sixteen
bits are treated as a bit pattern. Examples of computations using this for-
mat are the logical operations: NOT, AND, OR, XOR. These ALU
operations treat their operands as binary strings with no provision for sign
bit or binary point placement.