Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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ADSP-BF535 Blackfin Processor Hardware Reference 6-49
Memory
Data Test Command Register (DTEST_COMMAND)
When the Data Test Command register (
DTEST_COMMAND
), shown in
Figure 6-15 , is written to, the L1 cache data or tag arrays are accessed, and
the data is transferred through the Data Test Data registers (
DTEST
DATA[1:0]
).
Data Test Data 1 Register (DTEST_DATA1)
Data Test Data registers (
DTEST_DATA[1:0]
) contain the 64-bit data to be
written, or they contain the destination for the 64-bit data read. The Data
Test Data 1 register (
DTEST_DATA1
), shown in Figure 6-16 , stores the
upper 32 bits.
Figure 6-15. Data Test Command Register
X X
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
X X X X X X X X X X X X X X X X
X X X X X X X X X X X X X X
Data Test Command Register (DTEST_COMMAND)
00 - Access sub-bank 0.
01 - Access sub-bank 1.
10 - Access sub-bank 2.
11 - Access sub-bank 3.
Sub-bank Access
Reset = Undefined
Read/Write Access
Access Way
0 - Access Way0.
1 - Access Way1.
Data Bank Access
0 - Access Data Bank A.
1 - Access Data Bank B.
0 - Read access
1 - Write access
Array Access
0 - Access tag array
1 - Access data array
Double-word Index
Selects one of four 64-bit
double words in a 256-bit line
Set Index
Selects one of 64 sets
0xFFE0 0300