ADSP-BF535 Blackfin Processor Hardware Reference
4-13
Program Sequencer
These five ways of accessing the
CC
bit are used to control program flow.
The branch is explicitly separated from the instruction that sets the arith-
metic flags. A single bit resides in the instruction encoding that specifies
the interpretation for the value of
CC
. The interpretation is branch on true
or false.
The comparison operations have the form
CC = expr
where
expr
involves a
pair of registers of the same type (for example, Data registers or Pointer
registers, or a single register and a small immediate constant). The small
immediate constant is a 3-bit (–4 through 3) signed number for signed
comparisons and a 3-bit (0 through 7) unsigned number for unsigned
comparisons.
The sense of
CC
is determined by equal (
==
), less than (
<
), and less than or
equal to (
<=
). There are also bit test operations that test whether a bit in a
32-bit register is set.
Conditional Branches
The Sequencer supports conditional branches. These are
JUMP
instructions
whose execution is based on testing an
IF
condition that is based on the
status of the
CC
bit. The target of the branch is a PC-relative address from
the location of the instruction plus an offset. The PC-relative offset is an
11-bit immediate value that must be a multiple of two (bit zero must be a
zero). This gives an effective dynamic range of –1024 to +1022 bytes.
For example, the following instruction tests the
CC
flag and, if it is posi-
tive, jumps to a location identified by the label
dest_address
.
IF CC JUMP dest_address ;
Conditional Register Move
For condition handling where the value of a register is set based on the
condition code, a conditional move instruction can be used instead of a
branch statement. A register move can be performed, depending on
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...