Setting SPORT Modes
11-8
ADSP-BF535 Blackfin Processor Hardware Reference
Setting SPORT Modes
SPORT configuration is accomplished by setting bit and field values in
configuration registers. Each SPORT must be configured prior to being
enabled. Once the SPORT is enabled, further writes to the SPORT con-
figuration registers are disabled (except for the
SPORTx_TSCLKDIV
and
SPORTx_RSCLKDIV
registers, which can be modified while the SPORT is
enabled). To change values in all other SPORT configuration registers,
disable the SPORT by clearing
TSPEN
in
SPORTx_TX_CONFIG
and/or
RSPEN
in
SPORTx_RX_CONFIG
.
Each SPORT has its own set of control registers and data buffers. These
registers are described in detail in the following sections.
The SPORT control registers are programmed by writing to the appropri-
ate address in memory. All control and status bits in the SPORT registers
are active high unless otherwise noted.
Most configuration registers can only be changed while the
SPORT is disabled (
TSPEN/RSPEN=0
). Changes take effect after the
SPORT is re-enabled. The only exceptions to this rule are the
TSCLKDIV/RSCLKDIV
registers and multichannel configuration
registers.
SPORT Registers
The following sections describe the SPORT registers.
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...