Analog Devices ADSP-BF535 Blackfin, Hardware Reference Manual

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G-16 ADSP-BF535 Blackfin Processor Hardware Reference
Level 2 (L2) memory.
Memory that is at least one level removed from the core. L2 memory has a
larger capacity than L1 memory, but it requires additional latency to
access.
level sensitive interrupts.
A signal or interrupt that the processor detects if the input signal is low
(active) when sampled on the rising edge of
CLKIN
.
LIFO (Last In, First Out).
A data structure from which the next item taken out is the most recent
item put in. Also known as a “stack” from the analogy with the stack of
plates in a cafeteria in which the most recent plate placed on the stack is
on top and thus will be the next plate removed. See
Stack .
little endian.
The native data store format of the ADSP-BF535 processor. Words and
half words are stored in memory (and registers) with the least significant
byte at the lowest byte address and the most significant byte in the highest
byte address of the data storage location.
loop.
A sequence of instructions that executes several times with 0 overhead.
LRU (Least Recently Used algorithm).
A rule based on the observation that, in general, the cache entry that has
not been accessed for longest is least likely to be accessed in the near
future.
LSB.
See Least Significant Bit .