ADSP-BF535 Blackfin Processor Hardware Reference
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Introduction
Timers
There are three general-purpose programmable timer units in the
ADSP-BF535 processor. Each timer has one external pin that can be con-
figured either as a Pulse Width Modulator (PWM) or timer output, as an
input to clock the timer, or for measuring pulse widths of external events.
Each of the three timer units can be independently programmed as a
PWM, internally or externally clocked timer, or pulse width counter.
The timer units can be used in conjunction with either of the UARTs to
measure the width of the pulses in the data stream to provide an autobaud
detect function for a serial channel.
The timers can generate interrupts to the processor core to provide peri-
odic events for synchronization, either to the processor clock or to a count
of external signals.
In addition to the three general-purpose programmable timers, a fourth
timer is also provided. This extra timer is clocked by the internal processor
clock and is typically used as a system tick clock for generation of operat-
ing system periodic interrupts.
The ADSP-BF535 processor uses a programmable interval timer to gener-
ate periodic interrupts. An 8-bit prescale register sets the number of clock
cycles for decrementing a 32-bit count register. The number of clock
cycles per timer decrement can be from 1 to 256. An interrupt is gener-
ated when this count register reaches 0. The count register can be
automatically reloaded from a 16-bit period register and the count
resumed.
Serial Ports (SPORTs)
The ADSP-BF535 processor incorporates two complete synchronous
serial ports (SPORT0 and SPORT1) for serial and multiprocessor com-
munications. The SPORTs support these features:
Summary of Contents for ADSP-BF535 Blackfin
Page 80: ...Development Tools 1 26 ADSP BF535 Blackfin Processor Hardware Reference...
Page 312: ...Working With Memory 6 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 332: ...System Interfaces 7 20 ADSP BF535 Blackfin Processor Hardware Reference...
Page 360: ...Dynamic Power Management Controller 8 28 ADSP BF535 Blackfin Processor Hardware Reference...
Page 446: ...Beginning and Ending an SPI Transfer 10 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 522: ...Timing Examples 11 76 ADSP BF535 Blackfin Processor Hardware Reference...
Page 562: ...IrDA Support 12 40 ADSP BF535 Blackfin Processor Hardware Reference...
Page 608: ...PCI I O Issues 13 46 ADSP BF535 Blackfin Processor Hardware Reference...
Page 672: ...References 14 64 ADSP BF535 Blackfin Processor Hardware Reference...
Page 810: ...SDRAM Controller SDC 18 86 ADSP BF535 Blackfin Processor Hardware Reference...
Page 811: ...ADSP BF535 Blackfin Processor Hardware Reference 18 87 External Bus Interface Unit...
Page 812: ...SDRAM Controller SDC 18 88 ADSP BF535 Blackfin Processor Hardware Reference...
Page 860: ...DMA Bus Debug Registers 20 30 ADSP BF535 Blackfin Processor Hardware Reference...