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DATA-CHL (Data Channel)
Issue 5 October 2002
957
555-233-119
Data Channel Reset Test (#107)
This test is destructive.
This test resets the entire data communications interface provided by the four
DATA-CHLs. All existing connections over the DATA-CHLs are dropped.
Data Channel Dual Port RAM Test (#108)
This test is destructive.
This is a coordinated test of the dual port RAM that is shared between the
hardware and software. Control messages and data are passed through this dual
port RAM to establish and tear down connections over the DATA-CHLs. This test
requests each side to read and write the dual port RAM, first one at a time and
then simultaneously in alternate locations.
This test prevents any control stimuli from being received from or sent to the TDM
Bus control channel preventing the establishment of new connections over the
DATA-CHLs. However, existing connections are not (and cannot) be dropped.
Table 173. TEST #107 Data Channel Reset Test
Error
Code Test
Result Description/Recommendation
1000 ABORT System resources required to run this test are not available.
1. Try the command at 1-minute intervals a maximum of 5 times.
2100 ABORT System resources required for this test are unavailable.
ABORT An ABORT has one of two different meanings:
1. System resources required to run this test are not available.
2. Internal system error
10704 ABORT Internal system error
1. Try the command at 1-minute intervals a maximum of 5 times.
Any FAIL The circuit pack failed to reset.
1. Execute the command again.
2. If the problem persists, replace the Processor circuit pack.
After the Processor circuit pack has been replaced, its Time-of-Day clock
must be set using the set time command.
PASS The circuit pack initializes correctly.
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