Cypress S6J3200 Series, Manual

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Table of Contents
8 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
CHAPTER 18: Sound Generator........................................................................................................ 407
1. Overview ............................................................................................................................ 408
2. Configuration ...................................................................................................................... 409
3. Operations .......................................................................................................................... 410
3.1. Relation between the Amplitude Data Register (SGAR) and PWM Pulse ............ 412
3.2. Relation between the Frequency Data Register (SGFR) and Tone Pulse Signal
.............................................................................................................................
413
3.3. Relation between the PWM Cycle Data Register (SGPCR) and PWM Cycle ....... 414
3.4. Relation between the DMA Transfer Update Enable Register (SGDER) and DMA
Settings ................................................................................................................ 415
3.5. Sound Generator Operation ................................................................................. 420
3.6. Continuous Operation of Sound Generator by MCU ............................................ 423
3.7. Sound Generator Operation with DMA ................................................................. 425
3.8. Interrupt of Sound Generator ................................................................................ 442
4. Registers ............................................................................................................................ 443
4.1. DMA Transfer Update Enable Register (SGDER)................................................. 444
4.2. Sound Control Register (SGCR)........................................................................... 446
4.3. Amplitude Data Register (SGAR) ......................................................................... 450
4.4. Frequency Data Register (SGFR) ........................................................................ 451
4.5. Tone Output Number Register (SGNR) ................................................................ 452
4.6. Time Cycle Register (SGTCR) ............................................................................. 453
4.7. Increase and Decrease Data Register (SGIDR) ................................................... 454
4.8. PWM Cycle Data Register (SGPCR) .................................................................... 455
4.9. DMA Transfer Intermediate Register (SGDMAR) ................................................. 456
4.10. Interrupt Clear Register (SGCCR) ........................................................................ 458
CHAPTER 19: Sound Waveform Generator ...................................................................................... 459
1. Overview ............................................................................................................................ 460
2. Configuration and Block Diagram ....................................................................................... 461
3. Operation of the Sound Waveform Generator .................................................................... 462
3.1. Sound Source Specifications ................................................................................ 462
3.2. Interrupt ................................................................................................................ 464
3.3. SWFG Sound Source Generation Start ................................................................ 464
3.4. SWFG Sound Source Generation Stop ................................................................ 464
3.5. Continuous SWFG Sound Source Generation ..................................................... 465
3.6. Filter ..................................................................................................................... 466
4. Registers ............................................................................................................................ 468
4.1. Waveform Generator Channel Enable Register (WGCHEN) ................................ 468
4.2. Waveform Generator Channel Start Register (WGCHSTART) ............................. 470
4.3. Waveform Generator Channel Address1 Register (WGCHADD1) ....................... 472
4.4. Waveform Generator Channel Address2 Register (WGCHADD2) ....................... 474
4.5. Waveform Generator Channel Address3 Register (WGCHADD3) ....................... 476
4.6. Waveform Generator Channel Monaural Register (WGCHMONO) ...................... 477
4.7. Waveform Generator Channel n Control Register1 (WGCHnCTRL1, n=0 to 4)
.............................................................................................................................
479
4.8. Waveform Generator Channel n Control Register2 (WGCHnCTRL2, n=0 to 4)
.............................................................................................................................
483
4.9. Waveform Generator Channel n Control Register3 (WGCHnCTRL3, n=0 to 4)
.............................................................................................................................
485