CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
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4.5.
Setting of Pulse Detection
Figure 4-5 shows setting procedure of pulse detection.
Figure 4-5 Setting of Pulse Detection
Start setting of pulse detection
Uses a pulse detection?
Yes
No
End setting of pulse detection
Positive counter reload value setting
(ADC12Bn_PCCTRL0~63.PCTPRL[7:0])
Negative counter reload value setting
(ADC12Bn_PCCTRL0~63.PCTNRL[4:0])
Reload positive/negative counter value
(ADC12Bn_PCIRQC0~1.PCIRQC ="1")
Pulse counter interrupt enable setting
(ADC12Bn_PCIRQE0~1.PCIRQE)
Set as pulse counter interrupt disable
(ADC12Bn_PCIRQE0~1.PCIRQE = "0")
Summary of Contents for S6J3200 Series
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