Cypress S6J3200 Series, Manual

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CHAPTER 25:Programmable CRC
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 969
4.3.
CRC Final XOR Register (CRCn_FXOR)
The CRC Final XOR register (CRCn_FXOR) contains the values to be XOR’ed with the preliminary
checksum to finalize the CRC calculation
CRC Final XOR Register (CRCn_FXOR)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME FXOR[31] FXOR[30] FXOR[29] FXOR[28] FXOR[27] FXOR[26] FXOR[25] FXOR[24]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE Rp/Wp
INITIAL_VALUE 1 1 1 1 1 1 1 1
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME FXOR[23] FXOR[22] FXOR[21] FXOR[20] FXOR[19] FXOR[18] FXOR[17] FXOR[16]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE Rp/Wp
INITIAL_VALUE 1 1 1 1 1 1 1 1
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME FXOR[15] FXOR[14] FXOR[13] FXOR[12] FXOR[11] FXOR[10] FXOR[9] FXOR[8]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE Rp/Wp
INITIAL_VALUE 1 1 1 1 1 1 1 1
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME FXOR[7] FXOR[6] FXOR[5] FXOR[4] FXOR[3] FXOR[2] FXOR[1] FXOR[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE Rp/Wp
INITIAL_VALUE 1 1 1 1 1 1 1 1
[bit31:0] FXOR : CRC XOR Data
The contents of CRCn_FXOR register are XOR'ed with the preliminary checksum data (after
CRCn_CFG:ROBIT/ROBYT settings have been applied) and then the final checksum is moved to
CRCn_RD register. Initial value for final XOR register is 0xFFFFFFFF.
Notes:
−
The bits of this register affect the corresponding bits of the CRCn_RD register. Therefore, the bits
not belonging to the checksum should be written to "0". For the position of the checksum bits
depending on the used output bit/byte reflection refer to Table 3-3.