Cypress S6J3200 Series, Manual

Page: 378 / 1355

CHAPTER 16:Stepper Motor Controller
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 377
The PWM pulse width (duty cycle) is determined by the PWM Compare Data Value (PWC1.D[9:0],
PWC2.D[9:0]). In 8-bit operation mode (PWC.SC = "0"), the PWM Compare Data Value is taken from the
PWC1.D[7:0], PWC2.D[7:0] bits and bits PWC1.D[9:8], PWC2.D[9:8] are "don't care". In 10-bit operation
mode (PWC.SC = "1"), the PWM Compare Data Value is taken from the PWC1.D[9:0], PWC2.D[9:0] bits.
Below are the ranges in which PWM Compare Data Values (PWC1.D[9:0], PWC2.D[9:0]) can be set:
−
In 8-bit operation mode (PWC.SC = "0") 0% to 99.6% ( 0x00 to 0xFF)
−
In 10-bit operation mode (PWC.SC = "1") 0% to 99.9% ( 0x000 to 0x3FF)
The PWM Pulse Generator is started/stopped using the Count Enable bit (PWC.CE). When this bit is set
to "1", the PWM Pulse Generator starts the counter that controls the PWM period. The counter
increments its value from 0x00 (0x000) at the rising edge of the PWM operating clock. The PWM Pulse
Generator output remains at the "H" level until the counter value matches the PWM Compare Data Value.
Once the PWM Compare Data Value is reached, the PWM Pulse Generator output changes to "L" and
remains at the "L" level until the counter value overflows: 0xFF
 0x00 (0x3FF  0x000).
Figure 3-1 shows the PWM waveforms generated by the PWM Pulse Generator.
Figure 3-1 Examples of PWM1 and PWM2 Output Waveforms
If the PWM Pulse Generator is stopped (PWC.CE = "0"), the setting of the PWM pulse width (duty cycle)
and the output pin selection settings are not reflected on the Stepper Motor Controller outputs.
Notes:
−
If the PWM Pulse Generator is started(PWC.CE="1"), operate following steps because the PWM
Pulse Generator.Compare Data Value must be initialized.
1.
Set the PWM Compare Register.Compare Data Value(PWC1.D[9:0], PWC2.D[9:0])