CHAPTER 2:Function List
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
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Table 2-3: Function Digit Table for S6J320E
Part Number
S6J32X
(X = Function Digit)
Function Digit
K
L
M
N
CPU Clock Maximum
240MHz
240MHz
240MHz
240MHz
Graphics Clock Maximum
200MHz
200MHz
200MHz
200MHz
Display Output Support
ch.0, 1
ch.0, 1
ch.0, 1
ch.0, 1
Video Capture Support
1 unit
1 unit
1 unit
1 unit
Graphic Engine Type
2D, 3D
2D, 3D
2D, 3D
2D, 3D
HyperBus Interface
ch.0, 1
ch.0, 1
ch.0, 1, 2
ch.0, 1
Sound System
N/A
YES
YES
N/A
FPD-Link
YES
YES
YES
N/A
Media System
YES
YES
YES
YES
Chip Select Output of MFS
YES
YES
YES
YES
I
2
C
MFS ch.4, 10, 12, 16, 17 MFS ch.4, 10, 12, 16, 17 MFS ch.4, 10, 12, 16, 17 MFS ch.4, 10, 12, 16, 17
Notes:
−
This table only shows the relations between the optional function and the part numbers. That is,
all products are not necessarily available for orders. See the order number on the datasheet, and
confirm actual availabilities of products.
−
The sound system is composed of the sound waveform generator, the sound mixer, the audio
DAC, PCM-PWM, and I2S0.
−
The media system means both Ethernet AVB and Media LB.
−
The CLK_CPU is assigned for CPU clock. The CLK_CD3A0 is assigned for Graphic clock. They
are defined at the chapter of Clock Configuration.
−
Display Output ch.0 is used for RSDS and FPD-LINK (LVDS) as well as DRGB (Digital RGB).
The ch.0 of the product which doesn’t support FPD-LINK is used for RSDS and DRGB.
−
Display Output ch.1 is used for FPD-LINK (LVDS) and DRGB (Digital RGB). The ch.1 of the
product which doesn't support FPD-LINK is used for DRGB only.
−
HyperBus Interface ch.0 for MCU and ch.1 for graphic subsystem cannot be used
simultaneously.
Summary of Contents for S6J3200 Series
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