Cypress S6J3200 Series, Manual

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CHAPTER 28:LCD Controller
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 1055
[bit4] BK: Blanking selection
Bit Operation
0 LCD display
1 LCD no display
[bit3, bit2] MS1, MS0: Display mode selection
MS1 MS0 Display mode
0 0 LCD operation stop
0 1
1/2 duty output mode (Time division number: N=2, COM0, COM1)
1 0 1/3 duty output mode (Time division number: N=3, COM0 to COM2)
1 1 1/4 duty output mode (Time division number: N=4, COM0 to COM3)
When the display mode selection bits (MS [1:0]) are set to "00", the LCD controller's operation is stopped,
and the common pin/segment pin output "L" level.
[bit1, bit0] FP1, FP0: Frame cycle
FP1 FP0 Frame cycle
0 0 For CSS=0 : (2 11 × N)/F
CL
For CSS=1 : (2 3 × N)/F
CL
0 1 For CSS=0 : (2 12 × N)/F
CL
For CSS=1 : (2 4 × N)/F
CL
1 0 For CSS=0 : (2 13 × N)/F
CL
For CSS=1 : (2 5 × N)/F
CL
1 1 For CSS=0 : (2
14
× N)/F
CL
For CSS=1 : (2
6
× N)/F
CL
F
CL
: Main clock (LCR0:CSS=0) or sub clock (LCR0:CSS=1)
N : Time division number (depends on the setting of the display mode selection bits MS1, MS0)
Select the setting for FP1 and FP0 that is the optimum condition for the frame frequency of the LCD panel
to be used.