Cypress S6J3200 Series, Manual

Page: 388 / 1355

CHAPTER 16:Stepper Motor Controller
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 387
P[3] P[2:0] Description
0 101 PWM Operating clock is equal to CLKP/10
0 110 PWM Operating clock is equal to CLKP/12
0 111 PWM Operating clock is equal to CLKP/16
1 000 PWM Operating clock is equal to CLKP/2
1 001 PWM Operating clock is equal to CLKP/8
1 010 PWM Operating clock is equal to CLKP/10
1 011 PWM Operating clock is equal to CLKP/12
1 100 PWM Operating clock is equal to CLKP/16
1 101 PWM Operating clock is equal to CLKP/20
1 110 PWM Operating clock is equal to CLKP/24
1 111 PWM Operating clock is equal to CLKP/32
CLKP: Peripheral clock
Note:
−
Configuration of the PWM Operating Clock Prescaler bits (P[3:0]) shall be done while counting
operation is disabled (PWC.CE = "0").
[bit3] CE: Count Enable bit
The CE bit enables operation of the PWM Pulse Generators. When CE bit is set to "1", the PWM Pulse
Generator starts its operating. The PWM2 Pulse Generator starts with the delay of one Peripheral clock
cycle (CLKP) after the PWM1 Pulse Generator is started.
The CE bit can be set and cleared by the software. This bit also can be set to "1" by receiving trigger. To
receive trigger, the CE bit must first be cleared to "0".
Bit Description
0 Initializes and stops the operation of the PWM Pulse Generators
1 Starts the operation of the PWM Pulse Generators
Notes:
−
If the PWM Pulse Generator is started(CE="1"), operate following steps because the PWM Pulse
Generator.Compare Data Value must be initialized.
1.
Set the PWM Compare Register.Compare Data Value(PWC1.D[9:0], PWC2.D[9:0])
2.
Set the PWM Selection Register.Output Selection bits(PWS.BS="1", P2[2:0], M2[2:0], P1[2:0],
M1[2:0])
3.
Set the PWM Control Register.Count Enable bit(CE="1")
−
If the PWM Pulse Generator is stopped (CE="0") when the PWM pulse is selected by the Output
Selection bits (PWS.P2[2:0], M2[2:0], P1[2:0], M1[2:0]), the pin for which the PWM pulse is selected
is fixed to the "L" level.
−
If the trigger input is used, write "0" to the CE bit only when the CE bit is "1". Because the CE bit can
be cleared at the same time when the CE bit is set by the trigger.
−
The CE bit shall be set to "1" after the setting of the PWM Operating Clock Prescaler bits
(PWC.P[3:0]) and the Operation Mode Switching bit (PWC.SC) is completed.