CHAPTER 27:HyperBus Interface
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
1025
4.5.
Memory Configuration Register (HYPERBUSIn_MCR0 to 1)
The memory configuration for each memory space is set up.
REGISTER_NAME
HYPERBUSIn_MCRi
OFFSET
0x20 + i*4
ACCESS_SIZE
B H W
MULTIPLE
0:1
NUMERIC_TYPE
OTHER
Table 4-5 HYPERBUSI Memory Configuration Register Description
BIT_OFFSET
31
30
29
28
27
26
25
24
BIT_NAME
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
23
22
21
20
19
18
17
16
BIT_NAME
RFU
RFU
RFU
RFU
RFU
RFU
CRMO
ACS
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R/W
R/W
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
15
14
13
12
11
10
9
8
BIT_NAME
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
7
6
5
4
3
2
1
0
BIT_NAME
RFU
RFU
CRT
DEVTYPE
RFU
RFU
WRAPSIZE[1] WRAPSIZE[0]
ACCESS_TYPE
R0,WX
R0,WX
R/W
R/W
R0,WX
R0,WX
R/W
R/W
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
1
1
[bit31:18], [bit15:6], [bit3:2] RFU : Reserved for Future Use
When writing this register, this bit should be set to 0 for future compatibility. When reading this register,
this bit is 0 for future compatibility.
Summary of Contents for S6J3200 Series
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