Cypress S6J3200 Series, Manual

Page: 1179 / 1355

CHAPTER 32:Memory Protection Unit for AHB
1178 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.7.
MPU AHB End Address Registers (MPUHn_EADDR1 to 8)
Each region in MPU AHB can be defined by specifying a start address and end address for that particular
region. MPUHn_EADDR1 to 8 registers are used to specify the end addresses for the eight regions. The
end address indicates the last address for that region. The MPUHn_EADDR1 End Address Register for
Region 1 is explained below. Refer to the device-specific datasheet for the number of regions available.
MPUHn_EADDR1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
E
A
D
D
R
[3
1]
E
A
D
D
R
[3
0]
E
A
D
D
R
[2
9]
E
A
D
D
R
[2
8]
E
A
D
D
R
[2
7]
E
A
D
D
R
[2
6]
E
A
D
D
R
[2
5]
E
A
D
D
R
[2
4]
E
A
D
D
R
[2
3]
E
A
D
D
R
[2
2]
E
A
D
D
R
[2
1]
E
A
D
D
R
[2
0]
E
A
D
D
R
[1
9]
E
A
D
D
R
[1
8]
E
A
D
D
R
[1
7]
E
A
D
D
R
[1
6]
E
A
D
D
R
[1
5]
E
A
D
D
R
[1
4]
E
A
D
D
R
[1
3]
E
A
D
D
R
[1
2]
E
A
D
D
R
[1
1]
E
A
D
D
R
[1
0]
E
A
D
D
R
[9
]
E
A
D
D
R
[8
]
E
A
D
D
R
[7
]
E
A
D
D
R
[6
]
E
A
D
D
R
[5
]
E
A
D
D
R
[4
]
E
A
D
D
R
[3
]
E
A
D
D
R
[2
]
E
A
D
D
R
[1
]
E
A
D
D
R
[0
]
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R1 R1 R1 R1 R1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
Bit Position Bit Field Name Bit Description
[31:0] EADDR
End Address
End address for region 1
Note:
MPUHn_EADDR1 to 8 registers can only be written when the corresponding region is disabled
(MPUHn_CTRL1 to 8:MPUEN = "0") or the MPU is disabled (MPUHn_CTRL0:MPUEN = "0").