Cypress S6J3200 Series, Manual

Page: 633 / 1355

CHAPTER 21:Ethernet MAC
632 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
Bits Description
.
.
. .
.
.
0x18 1536 Byte (24 * 64 Byte) one maximum length frame/buffer
.
.
. .
.
.
0xA0 10240 Byte (160 * 64 Byte) one jumbo frame/buffer
.
.
. .
.
.
0xFF 16320 Byte (255 * 64 Byte)
[bit15:12] Reserved
Always read "0". Writing has no effect.
[bit11] tx_pbuf_tcp_en: Transmitter IP, TCP and UDP checksum generation offload
enable
Note: Not supported if DMA is configured in TX Partial Store and Forward Mode (i.e.
ETHERNETn_pbuf_txcutthru[31] = 0).
Bit Description
0 Transmit frame data is unaffected.
1
Transmitter checksum generation engine is enabled, to calculate and substitute checksums for transmit
frames.
[bit10] tx_pbuf_size: Transmitter packet buffer memory size select
This bit selects the amount of memory used for the transmit packet buffer. The reset value of "1"
represents the maximum available TX Packet Buffer Memory size of 16 Kbytes.
Bit Description
0 Do not use top address bit (8 Kbytes)
1 Use full configured addressable space (16 Kbytes)
[bit9:8] rx_pbuf_size: Receiver packet buffer memory size select
These bits select the amount of memory used for the receive packet buffer. The reset value of "0x3"
represents the maximum available RX Packet Buffer Memory size of 4 Kbytes.
Bits Description
00 Do not use top three address bits (512 bytes)
01 Do not use top two address bits (1 Kbytes)
10 Do not use top address bit (2 Kbytes)
11 Use full configure addressable space (4 Kbytes)
[bit7:6] Reserved
Always read "0". Always write “0”.