Cypress S6J3200 Series, Manual

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CHAPTER 21:Ethernet MAC
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 631
[bit29] tx_bd_extended_mode_en: Enable TX extended BD mode
See TX BD Control register (ETHERNETn_tx_bd_control) for description of feature.
Bit Description
0 Disable
1 Enable
[bit28] rx_bd_extended_mode_en: Enable RX extended BD mode
See RX BD Control register (ETHERNETn_rx_bd_control) for description of feature.
Bit Description
0 Disable
1 Enable
[bit27] Reserved
Always read "0". Writing has no effect.
[bit26] force_max_amba_burst_tx: Force maximum length bursts on TX
Bit Description
0 Maximum length bursts are not forced.
1
Force maximum length bursts on TX. Force the TX DMA to always issue maximum length bursts on EOP
(end of packet) or EOB (end of buffer) transfers as defined by bits [4:0] of this register, even when there
is less than maximum burst data bytes to read. Residual data read is ignored. Does not apply on bursts
that crosses 1K boundary.
[bit25] force_max_amba_burst_rx: Force maximum length bursts on RX
Bit Description
0 Maximum length bursts are not forced.
1
Force max length bursts on RX. Force the RX DMA to always issue maximum length bursts on EOP (end
of packet) or EOB (end of buffer) transfers, even if there is less than maximum burst packet data
required to be written. Any extra bytes of pad-data are set to 0x00. Does not apply on bursts that crosses
1K boundary.
[bit24] force_discard_on_err: Auto discard RX packets during lack of resource
A write to this bit is ignored if the DMA is not configured in the packet buffer full store and forward mode.
Bit Description
0
Received packets will remain to be stored in the packet buffer until AXI buffer resource becomes
available.
1
The Ethernet MAC DMA will automatically discard receive packets from the RX Packet Buffer Memory
when no AXI resource is available.
[bit23:16] rx_buf_size: DMA receive buffer size in system memory
The value defined by these bits determines the size of the buffer to use in system memory when writing
received data. The value is defined in multiples of 64 bytes.
Bits Description
0x00 Setting not allowed
0x01 64 Byte
0x02 128 Byte (2 * 64 Byte)