CHAPTER 33:Graphics Subsystem
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
1215
Bit
Description
0
The non-maskable interrupt is disabled and only the InterruptStatus register can be used to see the status.
1
The non-maskable interrupt is enabled.
[bit1] VRamInterruptECCDispEnable : VRAM ECC Display non-maskable Interrupt
Enable
This field can only be programmed once after reset. A second attempt at programming this will cause
an error response and no change to the enable.
Bit
Description
0
The non-maskable interrupt is disabled and only the InterruptStatus register can be used to see the status.
1
The non-maskable interrupt is enabled.
[bit0] VRamInterruptECC2DGCSysEnable : VRAM ECC 2D Graphics Core ( non Display )
and System non-maskable Interrupt Enable
This field can only be programmed once after reset. A second attempt at programming this will cause
an error response and no change to the enable.
Bit
Description
0
The non-maskable interrupt is disabled and only the InterruptStatus register can be used to see the status.
1
The non-maskable interrupt is enabled.
Summary of Contents for S6J3200 Series
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