Cypress S6J3200 Series, Manual

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CHAPTER 26:PCMPWM
978 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
2.2.
Configuration of the PCMPWM Module
PCMPWM Enable
After reset the PCMPWM module is disabled. All PWM outputs are held at their inactive values. To start
the PCM to PWM conversion and generate the PWM output signals, all configuration registers should be
initialized and the global enable bit PCMPWMi_CONTROL:EN set. Once the module has been enabled, it
must be ensured that the PCM data samples are provided to the FIFO buffer at the required rate. This
may be done by either the CPU or the DMA unit.
Operation Modes
The PCMPWM module supports three general modes of operation. Each mode is dedicated to a specific
type of connection to the speaker. The operation mode is configured in the MODE bits of the CONTROL
register (PCMPWMi_CONTROL:MODE). The following paragraphs describe these modes in detail.
1. Low-Pass Filter Mode
In the low-pass filter mode only a single output is used. The output drives an audio amplifier with a
low-pass filter connected in-between. Figure 2-2 depicts the corresponding circuit.
Figure 2-2 Simplified Schematic Illustration of Low Pass Filter Mode Output Circuit
For positive PCM data samples an output signal with a duty cycle of more than 50% is generated. For
negative PCM data samples, the signal has a duty cycle of less than 50%. A PCM data sample of zero
generates an exact 50% duty cycle output signal. A 0% and a 100% duty cycle may be reached as well
if the PWM count period and the PCM conversion offset are configured appropriately (registers
PCMPWMi_COUNTP and PCMPWMi_PCMOFFS).
2. Simplified H-Bridge Mode
In the simplified H-bridge mode two outputs are used to drive a speaker. A pair of complementary
emitter followers is connected to each output. Figure 2-3 depicts the circuit for simplified H-bridge
mode.
PCMPWM
PCMPWM_i_AH
Low-Pass
+
Amp