CHAPTER 25:Programmable CRC
960
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
Figure 3-2 CRC Operation with IRQ
data
CRCn_RD
Write next input data
to CRCn_WR register
Clear CRCn_CFG:CIRQ
ISR for CRC
−IRQ
Write input data to CRCn_WR
START
Wait till previous
CRC calculation is
completed.
No
Yes
CRCn_CFG:LOCK ==
’0’
CRCn_CFG
CRCn_POLY
CRCn_SEED
CRCn_FXOR
Configure:
Settings for IRQ generation:
CRCn_CFG:CIEN =
’1’
CRCn_CFG:CDEN =
’0’
left?
CRC input
Read checksum from
Yes
No
CPU clears interrupt flag CRCn_CFG:CIRQ,
by writing
’1’ to CRCn_CFG:CIRQCLR bit.
Note:
Summary of Contents for S6J3200 Series
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