CHAPTER 29:Indicator PWM
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
1093
3.2.
PWM Timer Count Operation Start
Configure the PWM timer count lock select setting (ITMCR:CKS2-0), PWM cycle setting (IPCSR), and
PWM duty setting (IPDUT) while the timer countdown is stopped (ICNTCR:DOP=0). After configuring
settings, enable the count (ICNTCR:CTEN=1) and restart the counter operation by setting the software
trigger (ICNTCR:STRG=1). As soon as the software setting is configured, the timer status becomes timer
count operation in progress (ICNTCR:DOP=1).
Figure 3-2: Timing Chart When Indicator PWM Timer Count Operation Starts
4*T T:
Main oscillator clock cycle
CTEN
Count clock
Count value
PWM output
waveform
0x0003
0x0001
0x0002
0x0000
0x0003
0x0002
0xXXXX
DOP
STRG
A time of 4T (T: main oscillator clock cycle) is required until the counter value is loaded after the STRG bit
becomes 1. Figure 3-1 shows the timing chart for when the cycle setting value is 0x3 and the duty value is
0x1.
Summary of Contents for S6J3200 Series
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