Cypress S6J3200 Series, Manual

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CHAPTER 21:Ethernet MAC
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 621
[bit17] transmit_pfc_priority_based_pause_frame:
Bit Description
0 No effect
1
Transmit PFC priority based pause frame. Takes the values stored in the Transmit PFC Pause register.
Cleared by hardware.
[bit16] pfc_enable: Enable PFC Priority Based Pause Reception
Bit Description
0 Disable
1 Enable PFC negotiation and recognition of priority based pause frames..
[bit15] store_rx_ts: Store receive time stamp
Bit Description
0 Normal operation
1
Setting this bit to one will cause the CRC of every received frame to be replaced with the value of the
nanoseconds field of the IEEE 1588 Timer that was captured as the receive frame passed the message
time stamp point.
[bit14] stats_read_snap: Read snapshot
Bit Description
0 The current value of the statistics register will be read back.
1 The snapshot value of the statistics register will be read back.
[bit13] stats_take_snap: Take snapshot
Bit Description
0 No effect
1
Record the current value of all statistics registers in the snapshot registers and clear the statistics
registers. Cleared by hardware.
[bit12] tx_pause_frame_zero: Transmit zero quantum pause frame
Bit Description
0 No effect
1 Transmit pause frame with zero quantum. Cleared by hardware.
[bit11] tx_pause_frame_req: Transmit pause frame
Bit Description
0 No effect
1 Transmit pause frame. Cleared by hardware.
[bit10] tx_halt_clk: Transmit halt
Bit Description
0 No effect
1 Halts transmission as soon as any ongoing frame transmission ends. Cleared by hardware.